SRI Tech Solutions Inc.

Lead the design of JD Edwards EnterpriseOne (E1) solutions, especially version 9.2 on latest release Experience in defining to-be processes and guide teams through implementations. Act as Team lead / Module Lead, managing project activities, deliverables, timelines and team coordination.

Job title: Lead Design Verification Engineer Location: Redmond / Seattle, WA He should have some lead experience, even hands on experience in also fine. Job Description: Design Verification expertise in System Verilog /UVM for Unit/Module level Verification Should have Lead Design Verification Team (Min 5 Members) Strong background in developing UVM Testbenches from scratch Experience in VIP Integration and Bring up Porting Existing Verilog/VHDL environment to UVM based Environment Experience in test planning, Coverage Coding and Debugging Deep Knowledge of AMBA Protocol is must Show less